Memory device for multiplexing input and output operation

Details Memory device for multiplexing input and output operation Memory device for multiplexing input and output operation

2006-10-10

2006-10-10

Le, Thong Q. (Department: 2827)

Static information storage and retrieval

Read/write circuit

Multiplexing

C365S189070, C365S189050

Reexamination Certificate

active

07120066

ABSTRACT:
A memory device for multiplexing an input/output operation prevents mis-operations by comparing the input addresses with the output data and improves operating speed by activating data corresponding to the input addresses by input address toggle. The memory device for multiplexing an input/output operation comprises an data output buffer, an address buffer, a comparison unit and a row activation control unit. The comparison unit compares an address outputted from the address buffer to the address bus with data inputted through the output data bus to the data output buffer, and outputs the comparison result. The row activation control unit generates a row active signal for activating a row path in response to the comparison result.

REFERENCES:
patent: 5617350 (1997-04-01), Roohparvar
patent: 6320794 (2001-11-01), Kang et al.
patent: 6590829 (2003-07-01), Takeuchi
patent: 6762963 (2004-07-01), Inoue et al.

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