Memory device with separate read and write gate voltage...

Static information storage and retrieval – Read/write circuit – Multiplexing

Reexamination Certificate

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Details

C365S189140, C365S189150, C365S189160, C365S191000

Reexamination Certificate

active

07619935

ABSTRACT:
A circuit and method are provided for controlling the gate voltage of a transistor acting between local and global input/output lines of a memory device, the circuit including a local input/output line, a local from/to global input/output multiplexer in signal communication with the local input/output line, a global input/output line in signal communication with the local from/to global input/output multiplexer, and a local from/to global input/output controller having an input node and an output node, the input node disposed for receiving a signal indicative of an input or output operation, and the output node in signal communication with a gate of the local from/to global input/output multiplexer for providing a gate signal of a first or second level in the presence of the output operation, and a gate signal of a third level in the presence of the input operation.

REFERENCES:
patent: 2008/0130375 (2008-06-01), Raghavan et al.
patent: 10-1999-0015874 (1999-03-01), None
patent: 100206899 (1999-04-01), None
patent: 100266660 (2000-06-01), None
patent: 1020040049175 (2002-12-01), None
patent: 1020030088321 (2003-11-01), None
patent: 1020030088421 (2003-11-01), None
patent: 1020040038449 (2004-05-01), None
patent: 1020050064709 (2005-06-01), None

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