Differential redundancy multiplexor for flash memory devices
Differential, level-shifted EEPROM structures
Distributed VDC for SRAM memory
Distributing CFI devices in existing decoders
Divided bit line system for non-volatile memory devices
Double byte select high voltage line for EEPROM memory block
Drain side sensing scheme for virtual ground flash EPROM...
DRAM and SRAM memory cells with repressed memory
Drift compensation in a flash memory
Drift compensation in a flash memory
Driving circuits for a memory cell array in a NAND-type...
Driving method of nonvolatile memory and nonvolatile memory...
Dual bit memory cell
Dual buffer flash memory architecture with multiple operating mo
Dual floating gate EEPROM cell array with steering gates shared
Dual mode memory with embedded ROM
Dual source side polysilicon select gate structure and programmi
Dynamic sub-array group selection scheme
Dynamically tunable resistor or capacitor using a...