Bandgap engineered split gate memory

Bias circuit for virtual ground non-volatile memory array with b

Bias scheme of program inhibit for random programming in a nand

Bit line biasing method to eliminate program disturbance in a no

BIT LINE CONTROL DECODER CIRCUIT, VIRTUAL GROUND TYPE...

Bit line gate transistor structure for a multilevel,...

Bit line reference circuit for a nonvolatile semiconductor memor

Bit map addressing schemes for flash/memory

Bitline transistor architecture for flash memory

Bitline transistor architecture for flash memory

Block architecture option circuit for nonvalatile...

Block architecture option circuit for nonvolatile...

Block erase for volatile memory

Block management for mass storage

Block switch in flash memory device

Block-level wordline enablement to reduce negative wordline stre

Boosting for non-volatile storage using channel isolation...

Boosting to control programming of non-volatile memory

Boosting to control programming of non-volatile memory

Boot block flash memory control circuit; IC memory card and...