Divided bit line system for non-volatile memory devices

Details Divided bit line system for non-volatile memory devices Divided bit line system for non-volatile memory devices

1998-01-15

1999-10-26

Nelms, David

Static information storage and retrieval

Floating gate

Particular connection

365 63, G11G 1134

Patent

active

059739614

ABSTRACT:
A sub-bit line architecture for non-volatile memory devices. Four sub-bit lines are coupled to each main bit line. The sub-bit lines are approximately one half the length of the main bit lines in each sector. This sub-bit line length provides low parasitic capacitance and high signal integrity. Each sub-bit line is coupled to a main bit line through a select transistor. A column latch is coupled to each main bit line to provide program data. Data is programmed to the memory array in a page program mode. In page program mode, the selected sub-bit line applies a programming voltage to the memory cell transistor drain terminals. The drain voltage is applied to all of the memory cell transistor drains coupled to the selected sub-bit line. Since the sub-bit lines are only half the length of the main bit lines in each sector, the number of memory cell transistors coupled to each sub-bit line is about half the number coupled to sub-bit lines that are the length of the main bit line. As a result, the number of times memory cell transistors are disturbed due to increases in drain voltage caused by the sub-bit line being selected is reduced. A further advantage of the present invention is that program disturb is reduced.

REFERENCES:
patent: 5283758 (1994-02-01), Nakayama et al.
patent: 5554867 (1996-09-01), Ajika et al.
patent: 5610871 (1997-03-01), Hidaka
patent: 5682343 (1997-10-01), Tomishima et al.

Affiliated with

Also associated with

Rating

Divided bit line system for non-volatile memory devices does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Divided bit line system for non-volatile memory devices, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Divided bit line system for non-volatile memory devices will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-771602