Static information storage and retrieval – Floating gate – Particular connection
Patent
1997-09-09
1998-10-13
Dinh, Son T.
Static information storage and retrieval
Floating gate
Particular connection
36518511, 36518518, 36518524, G11C 1400
Patent
active
058222430
ABSTRACT:
A dual mode memory cell and integrated circuit is provided with a native mode and a ROM mode. ROM code implants are incorporated into a standard memory array. The implants are deep implants which do not have a large effect on the threshold of the cell under normal substrate bias conditions. However, as the substrate bias is increased, they have an increasing effect on the cell threshold. Thus, the cells in one embodiment are floating gate cells that can be read in a flash mode, in which the threshold of the cell is determined predominately by charge stored in the floating gate of the cell, and a read only mode during which a substrate bias is applied, the charge stored in the floating gates in the sector to be read are equalized, and the threshold of the cell is determined predominately by the ROM code implants. Thus, more than one bit per cell is stored in the device, where one bit is stored in a read only mode and another bit is stored in a programmable and erasable mode in each cell in at least one sector of the memory device.
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Dinh Son T.
Haynes Mark A.
Macronix International Co. Ltd.
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