Managing data writing to memories
Mass storage array and methods for operation thereof
Memory address decoding circuit for a simultaneous operation fla
Memory and boundary searching method thereof
Memory and method for dissipation caused by current leakage
Memory architecture for non-volatile storage using gate...
Memory architecture with advanced main-bitline partitioning...
Memory arrangement with selectable memory sectors
Memory array and method of operating a memory
Memory array architecture for a memory device and method of...
Memory array architecture for a memory device and method of...
Memory array architecture utilizing global bit lines shared by m
Memory array architectures based on a triple-polysilicon...
Memory array having a reduced number of metal source lines
Memory array having a reduced number of metal source lines
Memory array incorporating memory cells arranged in NAND...
Memory array segmentation and methods
Memory array segmentation and methods
Memory array utilizing low voltage Fowler-Nordheim Flash EEPROM
Memory array with inverted data-line pairs