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Backwards-compatible memory module

Static information storage and retrieval – Addressing – Sync/clocking
Reexamination Certificate

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Balanced bitcell design for a multi-port register file

Static information storage and retrieval – Addressing – Multiple port access
Reexamination Certificate

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Bank availability indications for memory device and method...

Static information storage and retrieval – Addressing – Plural blocks or banks
Reexamination Certificate

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Bank command decoder in semiconductor memory device

Static information storage and retrieval – Addressing – Particular decoder or driver circuit
Reexamination Certificate

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Bank control device and semiconductor device including the same

Static information storage and retrieval – Addressing – Multiplexing
Reexamination Certificate

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Bank selectable Y-decoder circuit and method of operation

Static information storage and retrieval – Addressing – Particular decoder or driver circuit
Patent

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Bank selection for synchronous readable and writable semiconduct

Static information storage and retrieval – Addressing – Plural blocks or banks
Patent

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Bank selection signal control circuit for use in...

Static information storage and retrieval – Addressing – Plural blocks or banks
Reexamination Certificate

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Bank selection structures for a memory array, including a...

Static information storage and retrieval – Addressing – Plural blocks or banks
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Bank-based configuration and reconfiguration for...

Static information storage and retrieval – Addressing – Plural blocks or banks
Reexamination Certificate

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Banked SRAM device with bit line refresh

Static information storage and retrieval – Addressing – Plural blocks or banks
Patent

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Bi-CMOS type of semiconductor memory device

Static information storage and retrieval – Addressing – Including particular address buffer or latch circuit...
Patent

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Bias circuit for a memory line decoder driver of nonvolatile mem

Static information storage and retrieval – Addressing – Particular decoder or driver circuit
Patent

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BICMOS local address transition detection circuit

Static information storage and retrieval – Addressing – Sync/clocking
Patent

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BiCMOS memory word line driver

Static information storage and retrieval – Addressing – Particular decoder or driver circuit
Patent

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Binary to binary-encoded-ternary (BET) decoder using...

Static information storage and retrieval – Addressing – Particular decoder or driver circuit
Reexamination Certificate

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Bios memory and multimedia data storage combination

Static information storage and retrieval – Addressing
Patent

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Bipolar-CMOS semiconductor memory device

Static information storage and retrieval – Addressing – Particular decoder or driver circuit
Patent

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Bit addressable multidimensional array

Static information storage and retrieval – Addressing – Byte or page addressing
Patent

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Bit counter, and program circuit in semiconductor device and...

Static information storage and retrieval – Addressing – Sync/clocking
Reexamination Certificate

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