Bank command decoder in semiconductor memory device

Static information storage and retrieval – Addressing – Particular decoder or driver circuit

Reexamination Certificate

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C365S189050, C365S230080

Reexamination Certificate

active

07042796

ABSTRACT:
An apparatus, included in a semiconductor memory device, for generating a bank control signal, includes a logic block for receiving an internal precharge signal and a power-up signal and outputting a first signal; and a latch block for latching an internal active signal and the first signal in order to generate the bank control signal.

REFERENCES:
patent: 4933902 (1990-06-01), Yamada et al.
patent: 5469387 (1995-11-01), Kim
patent: 5802006 (1998-09-01), Ohta
patent: 6717862 (2004-04-01), Naso et al.
patent: 6765842 (2004-07-01), Kim

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