BiCMOS memory word line driver

Details BiCMOS memory word line driver BiCMOS memory word line driver

1991-08-28

1993-08-31

Popek, Joseph A.

Static information storage and retrieval

Addressing

Particular decoder or driver circuit

307449, G11C 800, H03K 19096

Patent

active

052415112

ABSTRACT:
A word line driver in a memory block circuit provides reduced propagation delay for a block control signal and higher output drive to the memory cells in a selected row. The block control signal passes through an isolation transistor in response to a first state of a maxi control signal. The block control signal is blocked by the isolation transistor in responsive to a second state of the maxi control signal which reduces capacitive loading on the block control signal and decreases its propagation delay. The combination of the block control signal and the maxi control signal enables a bipolar transistor to generate a high output drive row select signal to activate the memory cells in the selected row.

REFERENCES:
patent: 4618784 (1986-10-01), Chappell et al.
patent: 4843261 (1989-06-01), Chappell et al.

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