Bit addressable multidimensional array

Static information storage and retrieval – Addressing – Byte or page addressing

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365189, 340792, G11C 1300

Patent

active

047409274

ABSTRACT:
A memory array associated with a display can be accessed in either one of two substantially orthogonal directions. The memory array is structured so that it may be accessed, such as for reading or writing, in either the horizontal or vertical direction. Pel position representations in the array are arranged so that vertically sequential pel positions in a given column are represented by data in sequential memory modules rather than by data in the same memory module. Likewise, horizontally sequential pels in a given row are represented by data in sequential modules rather than in the same module. The memory array is comprised of a plurality of separate memory modules and is structured so that both x and y directional accessing into and out of the array is accomplished on a bit addressable x,y field. This enables any bit string in the array to be addressed and to be read from or written into the array in either the x or y direction. No word or byte boundaries exist in either the x direction of access or the y direction of access.

REFERENCES:
patent: 2736880 (1956-02-01), Forrester
patent: 3763480 (1973-10-01), Weimer
patent: 3772658 (1973-11-01), Sarlo
patent: 4249172 (1981-02-01), Watkins et al.
patent: 4291305 (1981-09-01), Kimura et al.
patent: 4442503 (1984-04-01), Schutt et al.
"Memory Systems for Image Processing", authored by D. C. Van Voorhis & T. H. Morrin, IEEE Transactions on Computers, vol. C-27, No. 2, Feb. 1978, pp. 113-125.

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