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Borderless contact process for a salicide devices

Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Patent

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Borderless contact structures

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Borderless contact to diffusion with respect to gate...

Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Reexamination Certificate

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Borderless contact with buffer layer

Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Reexamination Certificate

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Borderless contacts for dual-damascene interconnect process

Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Patent

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Borderless dual damascene contact

Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Reexamination Certificate

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Borderless interconnection process

Semiconductor device manufacturing: process – Chemical etching – Vapor phase etching
Reexamination Certificate

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Borderless vias

Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Reexamination Certificate

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Borderless vias on bottom metal

Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Reexamination Certificate

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Borderless vias with CVD barrier layer

Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Patent

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Borderless vias with HSQ gap filled metal patterns having...

Semiconductor device manufacturing: process – Coating of substrate containing semiconductor region or of... – Insulative material deposited upon semiconductive substrate
Reexamination Certificate

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Borderless vias with HSQ gap filled patterned metal layers

Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Patent

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Borderless vias without degradation of HSQ gap fill layers

Semiconductor device manufacturing: process – Chemical etching – Vapor phase etching
Reexamination Certificate

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Borderless vias without degradation of HSQ gap fill layers

Semiconductor device manufacturing: process – Chemical etching – Vapor phase etching
Patent

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Boride electrodes and barriers for cell dielectrics

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate

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Boride-based substrate for growing semiconducting layers...

Semiconductor device manufacturing: process – Making passive device – Resistor
Reexamination Certificate

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Boron diffusion barrier by nitrogen incorporation in spacer...

Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – Insulated gate formation
Reexamination Certificate

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Boron difluoride plasma doping method for forming...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having schottky gate
Reexamination Certificate

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Boron doping a semiconductor particle

Semiconductor device manufacturing: process – Introduction of conductivity modifying dopant into... – Diffusing a dopant
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Boron incorporated diffusion barrier material

Semiconductor device manufacturing: process – Introduction of conductivity modifying dopant into... – Ion implantation of dopant into semiconductor region
Reexamination Certificate

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