Borderless vias with CVD barrier layer

Details Borderless vias with CVD barrier layer Borderless vias with CVD barrier layer

1999-04-21

2000-12-12

Niebling, John F.

Semiconductor device manufacturing: process

Coating with electrically or thermally conductive material

To form ohmic contact to semiconductive material

438622, 438625, 438627, 438636, 438637, 438643, 438648, 438653, 438656, 438666, 438680, H01L 2144

Patent

active

061598518

ABSTRACT:
Borderless vias are filled by initially depositing a thin, conformal layer of titanium nitride by chemical vapor deposition to cover an undercut, etched side surface of a lower metal feature. A metal, such as tungsten, is subsequently deposited to fill the borderless via. Embodiments include thermal decomposition of an organic-titanium compound, such as tetrakis-dimethylamino titanium, and treating the deposited titanium nitride in an H.sub.2 /N.sub.2 plasma to lower its resistivity.

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