Borderless contacts for dual-damascene interconnect process

Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material

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Details

438624, 438637, H01L 21441

Patent

active

060487879

ABSTRACT:
For multiple layer interconnections using copper, the top interconnection layer and the via hole to the bottom layer are self-aligned on at least one side. The self-alignment eliminates the need for providing a border for the contact of the via hole to the interconnection. The self-alignment is accomplished by using a nitride mask, which defines one side of both the via hole and the interconnection. After the top surface of the copper interconnection is planarized, another layer of copper interconnection can be superimposed over the first interconnection in a similar manner.

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