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Bit line contact structure and method for forming the same

Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – Insulated gate formation
Reexamination Certificate

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Bit line implant

Semiconductor device manufacturing: process – Introduction of conductivity modifying dopant into...
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Bit line landing pad and borderless contact on bit line stud...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Bit line landing pad and borderless contact on bit line stud...

Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
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Bit line of a semiconductor device and method for...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Bit-line interconnection scheme for eliminating coupling...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Bit-line oxidation by removing ONO oxide prior to bit-line...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Bitline diffusion with halo for improved array threshold...

Semiconductor device manufacturing: process – Introduction of conductivity modifying dopant into... – Ion implantation of dopant into semiconductor region
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Bitline hard mask spacer flow for memory cell scaling

Semiconductor device manufacturing: process – Formation of electrically isolated lateral semiconductive... – Isolation by pn junction only
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Bitline implant utilizing dual poly

Semiconductor device manufacturing: process – Introduction of conductivity modifying dopant into... – Ion implantation of dopant into semiconductor region
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Bitline of semiconductor device having stud type capping...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Bitline structure and method for production thereof

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Bitline structure for DRAM and method of forming the same

Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
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Bladed silicon-on-insulator semiconductor devices and method...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – On insulating substrate or layer
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Blanket etching process for formation of tungsten plugs

Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
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Blanket oxidation for contact isolation

Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
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Blanket resist to protect active side of semiconductor

Semiconductor device manufacturing: process – Chemical etching – Combined with coating step
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Blanket well counter doping process for high speed/low power MOS

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Blending integrated circuit technology

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Block contact architectures for nanoscale channel transistors

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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