Bit line implant

Semiconductor device manufacturing: process – Introduction of conductivity modifying dopant into...

Reexamination Certificate

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C257SE21657, C257SE21679

Reexamination Certificate

active

07432178

ABSTRACT:
A method for performing a bit line implant is disclosed. The method includes forming a group of structures on an oxide-nitride-oxide stack of a semiconductor device. Each structure of the group of structures includes a polysilicon portion and a hard mask portion. A first structure of the group of structures is separated from a second structure of the group of structures by less than 100 nanometers. The method further includes using the first structure and the second structure to isolate a portion of the semiconductor device for the bit line implant.

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2002 IEEE International Solid-State Circuits Conference, Session 6, “SRAM and Non-Volatile Memories,” Feb. 4, 2004, 6 pages.
2002 IEEE International Solid-State Circuits Conference, 23 pages.

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