LandOfFree - US Patents - Listing for Semiconductor device manufacturing: process,Making field effect device having pair of active regions...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – On insulating substrate or layer

Ultra small-sized SOI MOSFET and method of fabricating the same

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – On insulating substrate or layer

Ultra thin body fully-depleted SOI MOSFETs

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Ultra thin channel MOSFET

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Ultra thin high K spacer material for use in transistor fabricat

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Ultra thin tunneling oxide using buffer CVD to improve edge thin

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Ultra-high capacitance device based on nanostructures

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Ultra-late programming ROM and method of manufacture

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Ultra-shallow junction formation by novel process sequence...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Ultra-shallow junction formation for deep sub-micron...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Ultra-shallow p-type junction having reduced sheet resistance an

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Ultra-shallow semiconductor junction formation

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Ultra-short channel recessed gate MOSFET with a buried contact

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Ultra-short transistor fabrication scheme for enhanced reliabili

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Ultra-thin body SOI MOSFET and gate-last fabrication method

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Ultra-thin channel device with raised source and drain and...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Ultra-thin fully depleted SOI device and method of fabrication

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Ultra-thin gate dielectrics

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Ultra-thin gate oxide through post decoupled plasma...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Ultra-thin Si channel CMOS with improved series resistance