Ultra thin tunneling oxide using buffer CVD to improve edge thin

Details Ultra thin tunneling oxide using buffer CVD to improve edge thin Ultra thin tunneling oxide using buffer CVD to improve edge thin

1997-12-29

1999-02-09

Booth, Richard A.

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

438762, 438763, H01L 218247, H01L 2131, H01L 21469

Patent

active

058693700

ABSTRACT:
A new method of forming a tunneling oxide film having a uniform thickness in the fabrication of a Flash EEPROM memory cell is described. A first oxide layer is provided on the surface of a semiconductor substrate wherein a portion of the first oxide layer is removed to expose the semiconductor substrate wherein the exposed portion of the semiconductor substrate comprises a tunneling window. A second oxide layer is deposited within the tunneling window. Thereafter, a thermal oxide layer is grown underlying the first oxide layer and the second oxide layer within the tunneling area wherein the presence of the second oxide layer provides for a uniform thermal oxide thickness throughout the tunneling window and wherein the second oxide layer and the thermal oxide layer together within the tunneling window form the tunneling oxide film in the fabrication of a memory cell.

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