Ultra-short channel recessed gate MOSFET with a buried contact

Details Ultra-short channel recessed gate MOSFET with a buried contact Ultra-short channel recessed gate MOSFET with a buried contact

1998-01-08

1999-03-02

Niebling, John

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

438297, 438299, 438585, H01L 21336

Patent

active

058770569

ABSTRACT:
Following with the formation of pad insulator layer and a stacked layer stacked, a gate insulator is formed within the defined gate insulator space. A lightly doped region is doped and the stacked layer and the pad insulator layer is removed. A semiconductor layer is formed and a gate space is defined over the gate insulator through a spacer structure. An anti punchthrough region is formed followed by the formation of a first insulator layer. A gate filling is then formed to fill within the gate space. A portion of the first insulator layer is then removed. A step of doping a plurality of junction ions is applied. A second insulator layer is formed and a thermal process is then proceeded. Finally a metalization process is employed on the semiconductor substrate.

REFERENCES:
patent: 5290716 (1994-03-01), Nakamura
patent: 5523258 (1996-06-01), Petti et al.
patent: 5545579 (1996-08-01), Liang et al.
patent: 5552329 (1996-09-01), Kim et al.
patent: 5571738 (1996-11-01), Krivokapic
patent: 5583064 (1996-12-01), Lee et al.
patent: 5605855 (1997-02-01), Chang et al.
patent: 5766998 (1998-06-01), Tseng

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