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Source/drain junction for high performance MOSFET formed by...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – On insulating substrate or layer
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Source/drain stressor and method therefor

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Source/drain stressors formed using in-situ epitaxial growth

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Spacer assisted trench top isolation for vertical DRAM's

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Spacer double patterning for lithography operations

Semiconductor device manufacturing: process – Making field effect device having pair of active regions...
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Spacer for a split gate flash memory cell and a memory cell...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Spacer formation by poly stack dopant profile design

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Spacer formation for graded dopant profile having a triangular g

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Spacer formation in a deep trench memory cell

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Spacer formation process using oxide shield

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Spacer like floating gate formation

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Spacer patterned augmentation of tri-gate transistor gate...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Spacer patterned, high dielectric constant capacitor

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Spacer process to eliminate corner transistor device

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Spacer shape engineering for void-free gap-filling process

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Spacer structure as transistor gate

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Spacer-less low-k dielectric processes

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Spacer-less transistor integration scheme for high-K gate...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Spacers to block deep junction implants and silicide...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – On insulating substrate or layer
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Spatially resolved temperature measurement and irradiance...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – On insulating substrate or layer
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