Source/drain junction for high performance MOSFET formed by...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – On insulating substrate or layer

Reexamination Certificate

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Details

C438S296000, C438S289000, C438S478000, C438S269000, C257S247000, C257S335000, C257SE21411, C257SE29261

Reexamination Certificate

active

07932136

ABSTRACT:
In a field effect transistor (FET), halo features may be formed by etching into the surface of a silicon layer followed by a step of growing a first epitaxial silicon (epi-Si) layer on the etched silicon layer. Source (S) and drain (D), as well as S/D extension features may similarly be formed by etching an epitaxial silicon layer, then filling with another epitaxial layer. Source and Drain, and extensions, and halo, which are normally formed by diffusion, may be formed as discrete elements by etching and filling (epi-Si). This may provide a shallow, highly activated, abrupt S/D extension, an optimally formed halo and deep S/D diffusion doping, and maximized improvement of channel mobility from the compressive or tensile stress from e-SiGe or e-SiC.

REFERENCES:
patent: 6750109 (2004-06-01), Culp et al.
patent: 2009/0061586 (2009-03-01), Yu et al.

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