Source/drain stressors formed using in-situ epitaxial growth

Details Source/drain stressors formed using in-situ epitaxial growth Source/drain stressors formed using in-situ epitaxial growth

2007-07-23

2010-11-16

Loke, Steven (Department: 2818)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C438S739000, C257SE21435

Reexamination Certificate

active

07833852

ABSTRACT:
A method for forming a semiconductor device is provided. The method includes forming a semiconductor layer. The method further includes forming a gate structure overlying the semiconductor layer. The method further includes forming a high-k sidewall spacer adjacent to the gate structure. The method further includes forming a recess in the semiconductor layer, the recess aligned to the high-k sidewall spacer. The method further includes forming an in-situ doped epitaxial material in the recess, the epitaxial material having a natural lattice constant different from a lattice constant of the semiconductor layer to create stress in a channel region of the semiconductor device.

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Da Zhang and Brian A. Winstead, “Source/Drain Stressor and Method Therefor” U.S. Appl. No. 11/680,181, filed Feb. 28, 2007.
M. Horstmann, et al., “Integration and Optimization of Embedded-SiGe, Compressive and Tensile Stressed Liner Films, and Stress Memorization in Advanced SOI CMOS Technologies” Electron Devices Meeting, 2005. IEDM Technical Digest. IEEE International, Dec. 5-7, 2005 pp. 233-236.
Ryuta Tsuchiya, et al., “Femto-Second CMOS Technology with High-k Offset Spacer and SiN Gate Dielectric with Oxygen-enriched Interface,” Symposium On VLSI Technology Digest of Technical Papers 2002, pp. 150-151.

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