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Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Robust latchup-immune CMOS structure

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Robust top-down silicon nanowire structure using a conformal...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having junction gate

Robust transistors with fluorine treatment

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

ROM coding by neuron activation

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

ROM device having memory units arranged in three dimensions, and

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

ROM device using a schuckly diode

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

ROM-embedded-DRAM

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Rough oxide hard mask for DT surface area enhancement for DT...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

RTCVD oxide and N.sub.2 O anneal for top oxide of ONO film

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

RTP booster to semiconductor device anneal

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Rugged metal electrodes for metal-insulator-metal capacitors

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Rugged metal electrodes for metal-insulator-metal capacitors

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Rugged polysilicon process for DRAM capacitors

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Rugged stacked oxide layer structure and method of fabricating s

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Ruthenium silicide diffusion barrier layers and methods of...