RTP booster to semiconductor device anneal

Details RTP booster to semiconductor device anneal RTP booster to semiconductor device anneal

1996-04-30

1999-08-03

Brown, Peter Toby

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

438301, 438305, 438306, 438307, H01L 21336

Patent

active

059337400

ABSTRACT:
A method is provided for increasing the electrical activation of dopants in a semiconductor device using rapid thermal processing (RTP). An aspect of the invention includes forming a gate on a semiconductor body (12), such as a substrate (14), and implanting a dopant (28) into the semiconductor body (12) proximate the gate. The dopant (28) is partially activated using a furnace. The dopant (28) is further activated using RTP. The activation of the dopant (28) through RTP in addition to the furnace annealing allows almost complete activation of the dopant while maintaining acceptable channel depths.

REFERENCES:
patent: 5169796 (1992-12-01), Murray et al.
patent: 5382533 (1995-01-01), Ahmad et al.
patent: 5468666 (1995-11-01), Chapman
patent: 5472896 (1995-12-01), Chen et al.
patent: 5489540 (1996-02-01), Liu et al.
International Electron Devices Meeting, Dec. 6-9, 1987, Washington, D.C., pp. 367-370, "0.25 Micron CMOS Technology Using P+ Polysilicon Gate PMOSFET" (N. Kasai, et al.).

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