Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Patent
1996-08-27
1998-12-22
Niebling, John
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
438763, 438790, H01L 218234, H01L 2131
Patent
active
058518673
ABSTRACT:
The present invention relates to a rugged stacked oxide layer structure which remarkably increases an area of a subsequent deposition layer over the rugged stacked oxide layer. The enlargement of the area of a deposition layer over the rugged oxide layer enables one to ameliorate an electrical characteristic of a device and provide a higher integration density. For example, the rugged stacked oxide layer can be used to provide a higher capacitance by enlarging the area of a storage electrode of a capacitor. Similarly it can also be used to increase light absorption of a photodetector per unit area by enlarging an interfacial area of a P-N junction of the photodetector.
REFERENCES:
patent: 4818337 (1989-04-01), Barnett
patent: 5049517 (1991-09-01), Liu
patent: 5484749 (1996-01-01), Maeda
patent: 5503882 (1996-04-01), Dawson
patent: 5545585 (1996-08-01), Wang
Chen Kuang-Chao
Tu Tuby
Chang Chi Ping
Lebentritt Michael S.
Mosel Vitellic Incorporated
Niebling John
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