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Method and structure for reducing contact aspect ratios

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Method and structure for reducing contact aspect ratios

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Method and structure for reducing induced mechanical stresses

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having junction gate
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Method and structure for reducing induced mechanical stresses

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having junction gate
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Method and structure for reducing leakage current in capacitors

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Method and structure for reducing leakage current in capacitors

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Method and structure for salicide trench capacitor plate...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Method and structure for self aligned formation of a gate...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Method and structure for shallow trench isolation during...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Method and structure for SOI wafers to avoid electrostatic...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – On insulating substrate or layer
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Method and structure for stacked DRAM capacitors and FETs...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Method and structure for textured surfaces in floating gate...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Method and structure for vertical DRAM devices with...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Method and structure in the manufacture of mask read only...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Method and structure of an auxiliary transistor arrangement...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Method and structure of an one time programmable memory...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Method and structure of etching a memory cell polysilicon gate l

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Method and structure of memory element plug with conductive...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Method and structure to improve the gate coupling ratio...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Method and structure to prevent silicide strapping of...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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