Method and structure of etching a memory cell polysilicon gate l

Details Method and structure of etching a memory cell polysilicon gate l Method and structure of etching a memory cell polysilicon gate l

1998-07-17

2000-08-29

Niebling, John F.

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

438258, H02L 21336

Patent

active

061107794

ABSTRACT:
A resist mask pattern having a reduced thickness is formed overlying on a silicon oxynitride film during formation of a memory gate. The resist mask pattern has a resist thickness (3000 to 4000 Angstroms) sufficient to withstand removal during etching of the silicon oxynitride film. The silicon oxynitride film, having a thickness of about 800 to 1500 Angstroms, is etched based on the resist mask pattern and then used as a mask pattern to etch the polysilicon gate layer underlying the silicon oxynitride layer, to expose a portion of an isolation region aligned relative to the resist mask pattern. The portion of the resist mask remaining after etching, in combination with the etched silicon oxynitride film, have a sufficient overall thickness to serve as a channel implant mask. Use of the resist mask pattern having the reduced thickness improves yield by minimizing the occurrence of misregistration, and enables reliable formation of spaces in the mask pattern having widths of less than 0.25 microns using conventional deep ultraviolet (DUV) photolithography techniques.

REFERENCES:
patent: 4182636 (1980-01-01), Dennard et al.
patent: 4192059 (1980-03-01), Khan et al.
patent: 4231051 (1980-10-01), Custode et al.
patent: 4869781 (1989-09-01), Euen et al.
patent: 5028557 (1991-07-01), Tsai et al.
patent: 5118639 (1992-06-01), Roth et al.
patent: 5294563 (1994-03-01), Rao
patent: 5496750 (1996-03-01), Moslehi
patent: 5518941 (1996-05-01), Lin et al.
patent: 5674788 (1997-10-01), Wristers et al.

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