Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2006-08-09
2010-06-15
Sarkar, Asok K (Department: 2891)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S257000, C257S315000, C257SE21680
Reexamination Certificate
active
07736967
ABSTRACT:
A structure and a manufacturing method for an OTP-EPROM in an embedded EEPROM integrated circuit structure. The structure has a substrate that includes a surface region. The structure has a gate dielectric is overlying the surface region. The structure also a first OTP-EPROM gate overlying the gate dielectric layer in a first cell region, and an EEPROM floating gate and a select gate overlying the gate dielectric layer in a second cell region. An insulating layer is overlying the first OTP-EPROM gate, the EEPROM floating gate and the select gate. An OTP-EPROM control gate is overlying the insulating layer and coupled to the first OTP-EPROM gate. An EEPROM control gate is overlying the insulating layer and coupled to the EEPROM floating gate.
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Becker et al. “Process and film characterization of low pressure tetraethylorthosilicoate-borophoshosilicate glass”, J.Vac.Sci.Techol. B 4 (3), 1886, pp. 732-744.
Chan YiPeng
Huang ShengHe
Lu Jing
Sarkar Asok K
Semiconductor Manufacturing International (Shanghai) Corporation
Slutsker Julia
Townsend and Townsend / and Crew LLP
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