LandOfFree - US Patents - Listing for Semiconductor device manufacturing: process,Making field effect device having pair of active regions...,Having insulated gate

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Ultra-shallow junction formation for deep sub-micron...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Ultra-shallow p-type junction having reduced sheet resistance an

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Ultra-shallow semiconductor junction formation

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Ultra-short channel recessed gate MOSFET with a buried contact

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Ultra-short transistor fabrication scheme for enhanced reliabili

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Ultra-thin body SOI MOSFET and gate-last fabrication method

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Ultra-thin channel device with raised source and drain and...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Ultra-thin fully depleted SOI device and method of fabrication

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Ultra-thin gate dielectrics

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Ultra-thin gate oxide through post decoupled plasma...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Ultra-thin Si channel CMOS with improved series resistance

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Ultra-thin silicon-on-insulator and...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Ultra-thin SOI MOSFET method and structure

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Ultraviolet blocking layer

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Undercut and residual spacer prevention for dual stressed...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Uniaxial strain relaxation of biaxial-strained thin films...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Uniform dielectric layer and method to form same

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Uniformly doped source/drain junction in a double-gate MOSFET

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Unit cell layout and transfer gate design for high density DRAMs