Search
Selected: M

Method and structure for forming a trench in a semiconductor...

Semiconductor device manufacturing: process – Formation of electrically isolated lateral semiconductive... – Grooved and refilled with deposited dielectric material
Reexamination Certificate

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Method and structure for relieving transistor performance...

Semiconductor device manufacturing: process – Formation of electrically isolated lateral semiconductive... – Grooved and refilled with deposited dielectric material
Reexamination Certificate

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Method and system for providing a contact on a semiconductor dev

Semiconductor device manufacturing: process – Formation of electrically isolated lateral semiconductive... – Grooved and refilled with deposited dielectric material
Patent

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Method for a consistent shallow trench etch profile

Semiconductor device manufacturing: process – Formation of electrically isolated lateral semiconductive... – Grooved and refilled with deposited dielectric material
Reexamination Certificate

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Method for and device having STI using partial etch trench...

Semiconductor device manufacturing: process – Formation of electrically isolated lateral semiconductive... – Grooved and refilled with deposited dielectric material
Reexamination Certificate

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Method for and structure formed from fabricating a...

Semiconductor device manufacturing: process – Formation of electrically isolated lateral semiconductive... – Grooved and refilled with deposited dielectric material
Reexamination Certificate

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Method for annealing a semiconductor

Semiconductor device manufacturing: process – Formation of electrically isolated lateral semiconductive... – Grooved and refilled with deposited dielectric material
Patent

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Method for buffer STI scheme with a hard mask layer as an...

Semiconductor device manufacturing: process – Formation of electrically isolated lateral semiconductive... – Grooved and refilled with deposited dielectric material
Reexamination Certificate

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Method for controlling etch process repeatability

Semiconductor device manufacturing: process – Formation of electrically isolated lateral semiconductive... – Grooved and refilled with deposited dielectric material
Reexamination Certificate

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Method for developing shallow trench isolation in a semiconducto

Semiconductor device manufacturing: process – Formation of electrically isolated lateral semiconductive... – Grooved and refilled with deposited dielectric material
Patent

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Method for dielectrically isolated deep pn-junctions in...

Semiconductor device manufacturing: process – Formation of electrically isolated lateral semiconductive... – Grooved and refilled with deposited dielectric material
Reexamination Certificate

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Method for eliminating inverse narrow width effects in the...

Semiconductor device manufacturing: process – Formation of electrically isolated lateral semiconductive... – Grooved and refilled with deposited dielectric material
Reexamination Certificate

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Method for eliminating stress induced dislocations in CMOS...

Semiconductor device manufacturing: process – Formation of electrically isolated lateral semiconductive... – Grooved and refilled with deposited dielectric material
Reexamination Certificate

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Method for eliminating transfer gate sacrificial oxide

Semiconductor device manufacturing: process – Formation of electrically isolated lateral semiconductive... – Grooved and refilled with deposited dielectric material
Reexamination Certificate

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Method for fabricating a microelectronic structure

Semiconductor device manufacturing: process – Formation of electrically isolated lateral semiconductive... – Grooved and refilled with deposited dielectric material
Reexamination Certificate

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Method for fabricating a MOS transistor with source/well...

Semiconductor device manufacturing: process – Formation of electrically isolated lateral semiconductive... – Grooved and refilled with deposited dielectric material
Reexamination Certificate

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Method for fabricating a semiconductor device

Semiconductor device manufacturing: process – Formation of electrically isolated lateral semiconductive... – Grooved and refilled with deposited dielectric material
Patent

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Method for fabricating a semiconductor device having a shallow t

Semiconductor device manufacturing: process – Formation of electrically isolated lateral semiconductive... – Grooved and refilled with deposited dielectric material
Patent

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Method for fabricating a semiconductor device with improved devi

Semiconductor device manufacturing: process – Formation of electrically isolated lateral semiconductive... – Grooved and refilled with deposited dielectric material
Patent

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Method for fabricating a semiconductor structure

Semiconductor device manufacturing: process – Formation of electrically isolated lateral semiconductive... – Grooved and refilled with deposited dielectric material
Reexamination Certificate

  [ 0.00 ] – not rated yet Voters 0   Comments 0
  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.