Semiconductor device manufacturing: process – Formation of electrically isolated lateral semiconductive... – Grooved and refilled with deposited dielectric material
Reexamination Certificate
2009-08-28
2011-11-01
Garber, Charles (Department: 2812)
Semiconductor device manufacturing: process
Formation of electrically isolated lateral semiconductive...
Grooved and refilled with deposited dielectric material
C438S199000, C438S286000, C438S296000, C438S278000, C438S400000, C438S426000, C257S327000, C257S330000, C257S331000, C257S332000, C257S334000, C257S336000, C257S408000, C257S488000, C257SE29118, C257SE21639
Reexamination Certificate
active
08048765
ABSTRACT:
According to an exemplary embodiment, a method for fabricating a MOS transistor, such as an LDMOS transistor, includes forming a gate stack over a well. The method further includes forming a recess in the well adjacent to a first sidewall of the gate stack. The method further includes forming a source region in the recess such that a heterojunction is formed between the source region and the well. The method further includes forming a drain region spaced apart from a second sidewall of the gate stack. In one embodiment, the source region can comprise silicon germanium and the well can comprise silicon. In another embodiment, the source region can comprise silicon carbide and the well can comprise silicon.
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Chen Henry Kuo-Shun
Chen Xiangdong
Shen Bruce Chih-Chieh
Abdelaziez Yasser
Broadcom Corporation
Farjami & Farjami LLP
Garber Charles
LandOfFree
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