Semiconductor device manufacturing: process – Formation of electrically isolated lateral semiconductive... – Grooved and refilled with deposited dielectric material
Reexamination Certificate
2006-07-18
2006-07-18
Kennedy, Jennifer M. (Department: 2812)
Semiconductor device manufacturing: process
Formation of electrically isolated lateral semiconductive...
Grooved and refilled with deposited dielectric material
C438S433000, C438S434000, C438S542000, C438S561000, C438S563000
Reexamination Certificate
active
07078315
ABSTRACT:
The present invention provides a method for eliminating inverse narrow width effects in the fabrication of DRAM devices. A semiconductor substrate is provided having thereon a shallow trench. The shallow trench surrounds an active area. A non-doped silicate glass (NSG) layer is deposited to fill the shallow trench, and is then etched back to a depth of the shallow trench, thereby exposing a portion of the semiconductor substrate at an upper portion of the shallow trench. A doped dielectric layer is deposited over the remaining NSG layer to cover the exposed semiconductor substrate. A thermal process is then carried out to diffuse dopants of the doped dielectric layer into the semiconductor substrate, thereby forming a doped region at the periphery of the active area in a channel width direction.
REFERENCES:
patent: 5684313 (1997-11-01), Kenney
patent: 5913132 (1999-06-01), Tsai
patent: 6465325 (2002-10-01), Ridley et al.
Chang Ming-Cheng
Chen Yinan
Wu Tieh-Chiang
Hsu Winston
Kennedy Jennifer M.
Nanya Technology Corp.
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