Method and system for providing a contact on a semiconductor dev

Details Method and system for providing a contact on a semiconductor dev Method and system for providing a contact on a semiconductor dev

1998-02-13

2000-08-15

Bowers, Charles

Semiconductor device manufacturing: process

Formation of electrically isolated lateral semiconductive...

Grooved and refilled with deposited dielectric material

438597, 438634, 438970, H01L 2176, H01L 2144

Patent

active

061035939

ABSTRACT:
A method for providing at least one contact on a semiconductor is disclosed. The semiconductor includes a plurality of isolation structures. The method and system include providing an etch-stop layer in direct contact with the semiconductor, providing a dielectric layer over the etch-stop layer, and etching through the dielectric layer and a portion of the etch-stop layer. A portion of the semiconductor in proximity with one of the plurality of isolation structures is not exposed during the etch.

REFERENCES:
patent: 5702981 (1997-12-01), Maniar et al.
patent: 5766974 (1998-06-01), Sardella et al.
patent: 5888887 (1999-03-01), Li et al.
patent: 5910020 (1999-06-01), Yamada
patent: 5960304 (1999-09-01), McAnally et al.
Stanley Wolf Silicon Processing for the VSLI Era vol. 2 Lattice Press p. 52, 1990.

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