Semiconductor device manufacturing: process – Formation of electrically isolated lateral semiconductive... – Grooved and refilled with deposited dielectric material
Patent
1997-11-26
1999-11-16
Bowers, Charles
Semiconductor device manufacturing: process
Formation of electrically isolated lateral semiconductive...
Grooved and refilled with deposited dielectric material
438439, 438362, 438297, 438221, H01L 2176
Patent
active
059857340
ABSTRACT:
A semiconductor device is disclosed, together with a fabricating method therefor. The semiconductor device has an etch barrier structure, made with SiN or SiON, which is formed on an element-isolating region alongside an active region. Although there is an alignment error which causes the element-isolating region to be exposed, the etch barrier structure protects the element-isolating region from being etched when carrying out the etching processes for contact holes in a semiconductor memory cell. Thus, while preventing the deterioration of element-isolation properties, the etch barrier structure can affords a larger allowable alignment error in the etching processes for contact holes, so it is possible to make a small active region and thus, highly integrate semiconductor devices.
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Blum David S
Bowers Charles
Hyundai Electronics Industries Co,. Ltd.
Kang Gregory B.
Nath Gary M.
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