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Selected: C

Circuit for allowing a two-pass fuse blow to memory chips combin

Error detection/correction and fault detection/recovery – Pulse or data error handling – Memory testing
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Circuit for and a method of generating an interleaver address

Error detection/correction and fault detection/recovery – Pulse or data error handling – Data formatting to improve error detection correction...
Reexamination Certificate

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Circuit for and method of accessing instruction data written...

Error detection/correction and fault detection/recovery – Data processing system error or fault handling – Reliability and availability
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Circuit for and method of accessing instruction data written...

Error detection/correction and fault detection/recovery – Data processing system error or fault handling – Reliability and availability
Reexamination Certificate

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Circuit for and method of determining the location of a...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Circuit for and method of determining the location of a...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Circuit for and method of implementing programmable logic...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Circuit for and method of testing a memory device

Error detection/correction and fault detection/recovery – Pulse or data error handling – Memory testing
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Circuit for bit skew suppression in high speed multichannel...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Skew detection correction
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Circuit for boosting encoding capabilities of test stimulus...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Circuit for calculating error position polynomial at high speed

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
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Circuit for checking a tristate detection circuit

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Circuit for comparing two N-digit binary data words

Error detection/correction and fault detection/recovery – Pulse or data error handling – Error/fault detection technique
Reexamination Certificate

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Circuit for compression and storage of circuit diagnosis data

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Reexamination Certificate

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Circuit for control and observation of a scan chain

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Circuit for controlling voltage fluctuation in integrated...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Circuit for detecting ground offset of parts of a network

Error detection/correction and fault detection/recovery – Data processing system error or fault handling – Reliability and availability
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Circuit for detecting reception errors in an asynchronous...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Error detection for synchronization control
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Circuit for easily testing a logic circuit having a number of in

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Patent

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Circuit for efficiently testing memory and shadow logic of a sem

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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