Tamper resistant shadow memory

Details Tamper resistant shadow memory Tamper resistant shadow memory

2007-03-06

2007-03-06

Ton, David (Department: 2138)

Error detection/correction and fault detection/recovery

Pulse or data error handling

Memory testing

C713S162000, C713S176000

Reexamination Certificate

active

10727251

ABSTRACT:
An integrated circuit comprising a processor and memory, the memory storing a set of data representing program code and/or an operating value, wherein each bit of the data is stored as a bit/inverse-bit pair in corresponding pairs of physically adjacent bit cells in the memory.

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