Algorithm to test LPAR I/O subsystem's adherence to LPAR I/O...

Algorithmic pattern generator

Algorithmic pattern generator for integrated circuit tester

Algorithmic test pattern generator, with built-in-self-test...

Algorithmically programmable memory tester with history...

Algorithmically programmable memory tester with test sites...

Allocating data bursts and supporting hybrid auto...

Allocation of sparing resources in a magnetoresistive...

Almost full-scan BIST method and system having higher fault...

Altering bit sequences to contain predetermined patterns

Alternating current built in self test (AC BIST) with...

Ameliorating the adverse impact of burst errors on the...

Amplifying magnitude metric of received signals during...

Amplifying magnitude metric of received signals during...

Analog boundary scan compliant integrated circuit system

Analog test access port and method therefor

Analog to digital converter with encoder circuit and testing...

Analog/digital characteristics testing device and IC testing...

Analogue/digital interface circuit

Analysis of data streams