Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Reexamination Certificate
2006-01-31
2006-01-31
Tu, Christine T. (Department: 2133)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Digital logic testing
C714S716000, C341S155000
Reexamination Certificate
active
06993693
ABSTRACT:
An analogue/digital interface circuit is disclosed in which an integral bistable circuit has its state changed by the arrival of an incoming analogue signal, however transient, and irrespective of when it arrives relative to the clock signal driving the digital circuit. The use of a bistable (flip-flop) circuit enables each parth of the interface circuit to be traversed when scan test signals are applied to it. Concurrently with the application of such signals, an inhibition signal is applied to the analogue signal inlet to prevent the arrival of any subsequency analogue signals from changing the state of the signal-storage element.
REFERENCES:
patent: 4393461 (1983-07-01), Holtey et al.
patent: 4504960 (1985-03-01), Yamada
patent: 5406216 (1995-04-01), Millman et al.
patent: 5574731 (1996-11-01), Qureshi
patent: 5712633 (1998-01-01), Bae
patent: 5847561 (1998-12-01), Whetsel
patent: 2001/0049806 (2001-12-01), Porteners et al.
patent: 09097164 (1997-04-01), None
Fitchett Michael
Krellner Jan
Freescale Semiconductor Inc.
Tu Christine T.
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