Circuit configuration for the burn-in test of a...

Circuit for allowing a two-pass fuse blow to memory chips combin

Circuit for and method of testing a memory device

Circuit for efficiently testing memory and shadow logic of a...

Circuit for inspecting a data error

Circuit for reducing test time and semiconductor memory...

Circuit, semiconductor device and method for enhancing test...

Circuit, system and method for arranging data output by...

Circuit, system and method for arranging data output by...

Circuitry, apparatus and method for embedding a test status...

Circuits and methods for repairing defects in memory devices

Circuits, architectures, apparatuses, systems, methods,...

Combined logic and memory circuit with built-in memory test

Combined processor access and built in self test in...

Command generator having single-input to multi-output converter

Comparable circuits for parallel testing DRAM device

Compilable address magnitude comparator for memory array...

Component testing and recovery

Component testing and recovery

Compression circuit for testing a memory device