Error detection/correction and fault detection/recovery – Pulse or data error handling – Memory testing
Reexamination Certificate
1999-10-28
2001-11-06
Chung, Phung M. (Department: 2133)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Memory testing
C714S812000
Reexamination Certificate
active
06314537
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a semiconductor memory, device; and, more particularly, to a command generator having a single-input to multi-output converter in a semiconductor memory device.
2. Prior Art of the Invention
Semiconductor memory devices, in particular, Dynamic Random Access Memories(DRAMs) have a higher degree of integration than the other components. Therefore, giga-bit level high integration memories can be implemented. The degree of integration will be, expected to be higher with advance of CMOS processing.
On the other hand, as the degree of integration becomes higher, the memory devices should implement special modes according to a demand of a system or JEDEC (Joint Electron Device Engineering Council) standard. In other words, a function, which is not need in a memory device having a lower degree of integration, is possible to be necessarily needed according to a demand of a microprocessor in a memory device having a higher degree of integration.
In a prior art, in order to implement the special modes, a high voltage having a predetermined level is applied to pins of a chip, or an additional logic circuit for implementing the special mode should be designed in the chip, thereby entering the special mode.
However, high voltage applied to the pins of the chip can give rise to mis-operation of the chip. On the other hand, the additional logic circuit gives rise to complications in a chip design. Also, a lot of control signals for generating a plurality of commands should be generated when the additional logic circuit is necessarily needed.
SUMMARY OF THE INVENTION
Therefore, it is an object of the present invention to provide a command generator having a single-input to multi-output converter.
It is another object of the present invention to provide a command generator which generates commands without a high, voltage applied from outside to thereby preventing circuits of a chip from mis-operation.
In accordance with one embodiment of the present invention, there is provided a command generator in a memory device, comprising: a converter for receiving first and second control signals from external circuit and an input signal having a plurality of pulses to generate binary data denoting a command, the converter, comprising: an input buffer, in response to the first and the second control signals, for receiving the input signal having a plurality of pulses and outputting an output signal having a number of pulses within a predetermined period, and a pulse counter for counting the number of pulses in the output signal to generate binary data representing the counted number.
In accordance with another embodiment of the present invention, there is provided a command generator in a memory device, comprising: a converter for receiving first and second control signals from external circuit and an input signal for test of the memory device, the input signal having a plurality of pulses to generate binary data denoting a command; a input detector for receiving binary input signals for normal operation and for outputting binary data denoting a command; and a mode command generator for outputting a command responsive to the binary data from the converter and the input detector.
In accordance with further another embodiment of the present invention, there is provided a memory device, comprising: a command generator in a memory device, including: a converter for receiving first and second control signals from external circuit and an input signal for test of the memory device, the input signal having a plurality of pulses to generate binary data denoting a command; a input detector for receiving binary input signals for normal operation and for outputting binary data denoting a command, and a mode command generator for outputting a command to set an operation mode for a circuit responsive to the binary data from the converter and the input detector.
REFERENCES:
patent: 4086625 (1978-04-01), Garnier et al.
Chung Phung M.
Hyundai Electronics Industries Co,. Ltd.
Jacobson & Holman PLLC
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