Error detection/correction and fault detection/recovery – Pulse or data error handling – Memory testing
Reexamination Certificate
2008-07-22
2008-07-22
Louis-Jacques, Jacques (Department: 2117)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Memory testing
C324S759030, C324S765010, C365S201000
Reexamination Certificate
active
07404117
ABSTRACT:
Disclosed are systems and methods of producing electronic devices. These electronic devices include excess circuits to be used as replacements for circuits that are found to be defective within the electronic device. The excess circuits are included in a different device component than the circuits that are found to be defective. The replacement process occurs after the excess circuits and defective circuits are included in an electronic device including the different device components. Identification of the defective circuits may occur before or after the defective circuits are incorporated in the electronic device. In some embodiments, systems and methods of the invention result in improved manufacturing yields as compared with the prior art.
REFERENCES:
patent: 5528539 (1996-06-01), Ong et al.
patent: 5594694 (1997-01-01), Roohparvar et al.
patent: 5677884 (1997-10-01), Zagar et al.
patent: 5761145 (1998-06-01), Zagar et al.
patent: 5825697 (1998-10-01), Gilliam et al.
patent: 5838620 (1998-11-01), Zagar et al.
patent: 5912579 (1999-06-01), Zagar et al.
patent: 5970008 (1999-10-01), Zagar et al.
patent: 6097647 (2000-08-01), Zagar et al.
patent: 6104645 (2000-08-01), Ong et al.
patent: 6191603 (2001-02-01), Muradali et al.
patent: 6205082 (2001-03-01), Tomita et al.
patent: 6208568 (2001-03-01), Zagar et al.
patent: 6216240 (2001-04-01), Won et al.
patent: 6351681 (2002-02-01), Chih et al.
patent: 6365421 (2002-04-01), Debenham et al.
patent: 6366487 (2002-04-01), Yeom
patent: 6445625 (2002-09-01), Abedifard
patent: 6457141 (2002-09-01), Kim et al.
patent: 6492727 (2002-12-01), Nishizawa et al.
patent: 6519171 (2003-02-01), Matsuzaki et al.
patent: 6531339 (2003-03-01), King et al.
patent: 6711042 (2004-03-01), Ishikawa
patent: 6732304 (2004-05-01), Ong
patent: 6812726 (2004-11-01), Ong
patent: 6825683 (2004-11-01), Berndt et al.
patent: 6882171 (2005-04-01), Ong
patent: 6967397 (2005-11-01), Inoue et al.
patent: 6996745 (2006-02-01), Shaylor
patent: 7006940 (2006-02-01), Ong
patent: 7053470 (2006-05-01), Sellers et al.
patent: 7061263 (2006-06-01), Ong
patent: 7075175 (2006-07-01), Kazi et al.
patent: 7133798 (2006-11-01), Ong
patent: 7139204 (2006-11-01), Behera
patent: 7139945 (2006-11-01), Ong
patent: 7149135 (2006-12-01), Okuno
patent: 7269765 (2007-09-01), Charlton et al.
patent: 7305595 (2007-12-01), Goodwin et al.
patent: 2004/0100296 (2004-05-01), Ong
patent: 2004/0150089 (2004-08-01), Inoue et al.
patent: 2004/0196709 (2004-10-01), Ong
patent: 2005/0023656 (2005-02-01), Leedy
patent: 2005/0024977 (2005-02-01), Ong
patent: 2005/0204223 (2005-09-01), Ong
patent: 2005/0204230 (2005-09-01), Nilson
patent: 2005/0289428 (2005-12-01), Ong
patent: 2006/0152241 (2006-07-01), Ong
U.S. Appl. No. 11/552,944, Adrian Ong, Integrated Circuit Testing Module Configured for Set-up and Hold Time Testing, filed Oct. 25, 2006.
U.S. Appl. No. 11/552,938, Adrian Ong, Integrated Circuit Testing Module Including Signal Shaping Interface, filed Oct. 25, 2006.
U.S. Appl. No. 11/538,799, Adrian Ong, Testing and Recovery in a Multilayer Device, filed Oct. 4, 2006.
U.S. Appl. No. 11/480,234, Adrian Ong, Delay Lock Loop Delay Adjusting Method and Apparatus, filed Jun. 30, 2006.
U.S. Appl. No. 11/479,061, Adrian Ong, Integrated Circuit Test Array Including Test Module, filed Jun. 30, 2006.
U.S. Appl. No. 11/472,016, Adrian Ong, Shared memory bus architecture for system with processor and memory units, filed Jun. 20, 2006.
U.S. Appl. No. 11/443,872, Adrian Ong, Integrated Circuit Testing Module Including Command Driver, filed May 30, 2006.
U.S. Appl. No. 11/370,795, Adrian Ong, Integrated Circuit Testing Module Including Address Generator, filed Mar. 7, 2006.
U.S. Appl. No. 11/370,769, Adrian Ong, Integrated Circuit Testing Module Including Data Generator, filed Mar. 7, 2006.
U.S. Appl. No. 11/369,878, Adrian Ong, Integrated Circuit Testing Module Including Data Compression, filed Mar. 6, 2006.
U.S. Appl. No. 11/304,445, Adrian Ong, Integrated circuit testing module, filed Dec. 14, 2005.
U.S. Appl. No. 11/223,286, Adrian Ong, Shared bond pad for testing a memory within a packaged semiconductor device, filed Sep. 9, 2005.
U.S. Appl. No. 11/208,099, Adrian Ong, A Processor Memory Unit for Use in System-in-Package and System-in-Module Devices, filed Aug. 18, 2005.
U.S. Appl. No. 11/207,665, Adrian Ong, Electronic device having an interface supported testing mode, filed Aug. 18, 2005.
U.S. Appl. No. 11/207,518, Adrian Ong, Architecture and method for testing of an integrated circuit device, filed Aug. 19, 2005.
U.S. Appl. No. 11/108,385, Adrian Ong, Bonding Pads for Testing of a Semiconductor Device, filed Apr. 18, 2005.
U.S. Appl. No. 11/083,473, Adrian Ong, Internally Generating Patterns for Testing in an Integrated Circuit Device, filed Mar. 18, 2005.
U.S. Appl. No. 10/877,687, Adrian Ong, Multiple Power Levels for a Chip Within a Multi-Chip Semiconductor Package, filed Jun. 25, 2004.
U.S. Appl. No. 10/205,883, Adrian Ong, Internally generating patterns for testing in an integrated circuit device, filed Jul. 25, 2002.
U.S. Appl. No. 09/681,053, Kolluru, Mahadev S., Embedded memory architecture for video applications, filed Dec. 12, 2000.
U.S. Appl. No. 11/744,815, Adrian Ong, Integrated Circuit Testing Module Including Multiplexed Inputs, filed May 4, 2007.
Egan Richard G.
Ong Adrian E.
Carr & Ferrell LLP
Inapac Technology, Inc.
Louis-Jacques Jacques
Tabone, Jr. John J
LandOfFree
Component testing and recovery does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Component testing and recovery, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Component testing and recovery will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2785407