Circuit for inspecting a data error

Error detection/correction and fault detection/recovery – Pulse or data error handling – Memory testing

Reexamination Certificate

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Details

C714S054000

Reexamination Certificate

active

06912677

ABSTRACT:
A circuit for inspecting a data error is described herein. The circuit for inspecting a data error comprises a clock buffer, a buffer unit, a latch unit, a decoder, a compression unit, a counter, a data bus signal latch unit, and a select unit.

REFERENCES:
patent: 5511029 (1996-04-01), Sawada et al.
patent: 5587950 (1996-12-01), Sawada et al.
patent: 5959930 (1999-09-01), Sakurai
patent: 6735729 (2004-05-01), Merritt et al.
patent: 6816422 (2004-11-01), Hamade et al.

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