Error detection/correction and fault detection/recovery – Pulse or data error handling – Memory testing
Reexamination Certificate
2006-08-22
2006-08-22
Britt, Cynthia (Department: 2138)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Memory testing
C714S733000
Reexamination Certificate
active
07096393
ABSTRACT:
Disclosed are novel methods and apparatus for efficiently providing instruction-based BIST of memory interconnects. In an embodiment of the present invention, a method of testing a memory interconnect between an external memory module and a chip is disclosed. The method includes: providing an on-chip memory controller coupled to the external memory module, the on-chip memory controller sending and receiving data to and from the external memory module; providing an on-chip built-in self-test (BIST) module coupled to the on-chip memory controller, the BIST module including an instruction register to store a plurality of instructions; testing the external memory module; and once the external memory module has successfully passed the testing, utilizing the external memory module in testing the memory interconnect.
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Bayraktaroglu Ismet
Caty Olivier
Majumdar Amitava
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