Integrated circuit having a high speed clock input buffer
Integrated circuit having dynamic logic with reduced standby...
Integrated circuit with centralized control of edge transition d
Integrated circuit with reduced clock skew
Integrated logic and latch design with clock gating at...
Intelligent precharger for a dynamic bus
Interface circuit, system and method for interfacing an electron
Interlocked restore circuit
Internal clock jitter detector
Inverting dynamic register with data-dependent hold time...
Inverting dynamic register with data-dependent hold time...
Inverting hold time latch circuits, systems, and methods
Latch circuit with state-walk logic
Latch structure for ripple domino logic
Latched time borrowing domino circuit
Latching dynamic logic structure, and integrated circuit...
Leak tolerant low power dynamic circuits
Leakage sensing and keeper circuit for proper operation of a...
Leakage-tolerant dynamic wide-NOR circuit structure
Leakage-tolerant keeper with dual output generation...