Electronic digital logic circuitry – Clocking or synchronizing of logic stages or gates – Field-effect transistor
Reexamination Certificate
2007-04-10
2007-04-10
Barnie, Rexford (Department: 2819)
Electronic digital logic circuitry
Clocking or synchronizing of logic stages or gates
Field-effect transistor
C326S093000, C326S094000, C326S095000, C326S096000, C326S097000, C326S112000, C326S119000, C326S121000, C324S763010
Reexamination Certificate
active
10937703
ABSTRACT:
A method and apparatus for ensuring proper operation of a dynamic circuit is provided. A dynamic circuit instance has a plurality of outputs connected to a respective one of a plurality of leakage detector circuits. An output of each leakage detector circuit is connected with a respective one of a plurality of keeper circuits that reside at the dynamic circuit. Each of the plurality of keeper circuits has a unique size ratio with respect to a logic element size of the dynamic circuit.
REFERENCES:
patent: 6794901 (2004-09-01), Bernstein et al.
patent: 6894528 (2005-05-01), Gauthier et al.
patent: 2004/0104744 (2004-06-01), Bosshart
patent: 2004/0189337 (2004-09-01), Hsu et al.
patent: 2004/0263208 (2004-12-01), Levy et al.
Chu Sam Gat-Shang
Klim Peter Juergen
Lee Michael Ju Hyeok
Paredes Jose Angel
Fay III Theodore D.
Gerhardt Diana R.
White Dylan
Yee Duke W.
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