Electronic digital logic circuitry – Clocking or synchronizing of logic stages or gates
Patent
1998-10-06
2000-06-13
Tokar, Michael
Electronic digital logic circuitry
Clocking or synchronizing of logic stages or gates
326 95, 326 96, H03K 1900
Patent
active
060753854
ABSTRACT:
A method and apparatus for precharging a dynamic bus on either phase of a clock signal is presented. An intelligent precharger in accordance with the invention monitors a dynamic bus and detects and signals a discharge event on the bus during a current phase of a clock signal. The current phase of the clock signal can be either one of a first phase or second phase of the clock signal. On the subsequent phase of the clock signal, which is the other of the first phase or second phase of the clock signal, the bus is then precharged.
REFERENCES:
patent: 5116561 (1992-05-01), Okura
Dorweiler Paul J.
Meneghini Thomas L.
Hewlett--Packard Company
Tokar Michael
Tran Anh
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