Electronic digital logic circuitry – Clocking or synchronizing of logic stages or gates – Field-effect transistor
Patent
1997-01-27
1999-04-20
Santamauro, Jon
Electronic digital logic circuitry
Clocking or synchronizing of logic stages or gates
Field-effect transistor
326121, 326 96, H03K 19096
Patent
active
058960465
ABSTRACT:
A method and implementing structure for a domino block circuit 200 includes a minimal component latching circuit 203 which is merged with an exemplary MUX functional block 201, to provide both inverting and latching functions with minimal propagation delay in the domino data path. Implementations with scanning circuitry and including a holding feature are also illustrated.
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Bjorksten Andrew Augustus
Ciraula Michael Kevin
Durham Christopher McCall
Mikan, Jr. Donald George
England Anthony V. S.
International Business Machines - Corporation
Le Don Phu
Santamauro Jon
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