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Data bit-to-clock alignment circuit with first bit capture...

Electrical computers and digital processing systems: support – Synchronization of clock or timing signals – data – or pulses – Using delay
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Data paths with receiver timing fixable to a downstream...

Electrical computers and digital processing systems: support – Synchronization of clock or timing signals – data – or pulses – Using delay
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Data processing apparatus and method for translating a...

Electrical computers and digital processing systems: support – Synchronization of clock or timing signals – data – or pulses – Using delay
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Data reception method

Electrical computers and digital processing systems: support – Synchronization of clock or timing signals – data – or pulses – Using delay
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Data transfer unit and method

Electrical computers and digital processing systems: support – Synchronization of clock or timing signals – data – or pulses – Using delay
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Data transmission across asynchronous time domains using...

Electrical computers and digital processing systems: support – Synchronization of clock or timing signals – data – or pulses – Using delay
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Data transmission across asynchronous time domains using...

Electrical computers and digital processing systems: support – Synchronization of clock or timing signals – data – or pulses – Using delay
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DDR clocking

Electrical computers and digital processing systems: support – Synchronization of clock or timing signals – data – or pulses – Using delay
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DDR control

Electrical computers and digital processing systems: support – Synchronization of clock or timing signals – data – or pulses – Using delay
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Delay time judging apparatus

Electrical computers and digital processing systems: support – Synchronization of clock or timing signals – data – or pulses – Using delay
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Delaying clock and data signals to force synchronous...

Electrical computers and digital processing systems: support – Synchronization of clock or timing signals – data – or pulses – Using delay
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Delaying lanes in order to align all lanes crossing between...

Electrical computers and digital processing systems: support – Synchronization of clock or timing signals – data – or pulses – Using delay
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Device and method for ensuring that a signal always reaches...

Electrical computers and digital processing systems: support – Synchronization of clock or timing signals – data – or pulses – Using delay
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Device and method for synchronizing an exchange of data with...

Electrical computers and digital processing systems: support – Synchronization of clock or timing signals – data – or pulses – Using delay
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Device and system for adjusting delay in a data path based...

Electrical computers and digital processing systems: support – Synchronization of clock or timing signals – data – or pulses – Using delay
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Digital delay locked loop circuit using mode register set

Electrical computers and digital processing systems: support – Synchronization of clock or timing signals – data – or pulses – Using delay
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Digital delay locked loop with extended phase capture range

Electrical computers and digital processing systems: support – Synchronization of clock or timing signals – data – or pulses – Using delay
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Digital signal processing circuitry having integrated timing inf

Electrical computers and digital processing systems: support – Synchronization of clock or timing signals – data – or pulses – Using delay
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Digital system having a multiplicity of self-calibrating...

Electrical computers and digital processing systems: support – Synchronization of clock or timing signals – data – or pulses – Using delay
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Digital system of adjusting delays on circuit boards

Electrical computers and digital processing systems: support – Synchronization of clock or timing signals – data – or pulses – Using delay
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