Parallel data interface and method for high-speed timing...
Phase adjusted delay loop executed by determining a number...
Phase comparator for a phase locked loop
Phase-controlled source synchronous interface circuit
Process independent source synchronous data capture...
Program logic device for synchronous operation with multiple...
Programmable compensated delay for DDR SDRAM interface using...
Programmable delay circuit having a fine delay element...
Programmable delay timing calibrator for high speed data interfa
Programmable logic device integrated circuit with dynamic...
Programmable timing module for adjusting clock in bus system
Protection of boot block data and accurate reporting of boot...