VLIW digital signal processor for achieving improved binary...

VLIW processor accepting branching to any instruction in an...

VLIW processor and method therefor

VLIW processor for exchanging and inputting sub-instructions...

VLIW processor has different functional units operating on comma

VLIW processor with data spilling means

VLIW processor with less instruction issue slots than functional

VLIW processor with write control unit for allowing less write b

VLIW system with predicated instruction execution for individual

Voltage droop mitigation through instruction issue throttling

Wake-up and sleep conditions of processors in a...

Watchpoint engine for a pipelined processor

Wide connections for transferring data between PE's of...

Wide memory architecture vector processor using nxP bits wide me

Wide shifting in the vector permute unit

Work-efficient parallel prefix sum algorithm for graphics...

Write before read interlock for recovery unit operands

Writing of instruction results produced by instruction execution

Zero overhead branching and looping in time stationary...

Zero overhead computer interrupts with task switching